Performance analysis of arithmetic logic unit with reversible logic

Show simple item record

dc.contributor.author Arya, G.
dc.contributor.author Chauhan, D.S.
dc.date.accessioned 2020-10-15T11:50:46Z
dc.date.available 2020-10-15T11:50:46Z
dc.date.issued 2020-07
dc.identifier.issn 2278-3091
dc.identifier.uri http://localhost:8080/xmlui/handle/123456789/821
dc.description.abstract With advent of quantum computing the urge of using energy efficient digital circuits have become need of hour for many power constrained applications. Our aim is to develop energy efficient combinational and sequential circuits to implement energy efficient applications for large networks in a standalone manner. Clearly quantum computing principle backs the aim and provides digital circuits with better operational and computing methods to save energy which can further be used to enhance lifetime of networks to work for longer time. This paper presents application of reversible logic in arithmetic logic unit. This unit is integral part for almost all digital computational circuit. The results can be viewed in wider purview of its induction in many industrial applications. © 2020, World Academy of Research in Science and Engineering. All rights reserved. en_US
dc.language.iso en_US en_US
dc.publisher World Academy of Research in Science and Engineering en_US
dc.relation.ispartofseries International Journal of Advanced Trends in Computer Science and Engineering;Vol. 9 issue 4
dc.subject Quantum Computing en_US
dc.subject Life Expectancy en_US
dc.subject Arithmetic Logic Unit en_US
dc.subject Garbage Output en_US
dc.title Performance analysis of arithmetic logic unit with reversible logic en_US
dc.type Article en_US


Files in this item

This item appears in the following Collection(s)

Show simple item record

Search in IDR


Advanced Search

Browse

My Account