- IDR Home
- →
- Thesis
- →
- Department of Electronics Engineering
- →
- View Item
JavaScript is disabled for your browser. Some features of this site may not work without it.
| dc.contributor.author | Kumar, Sanjay | |
| dc.date.accessioned | 2021-08-03T09:37:52Z | |
| dc.date.available | 2021-08-03T09:37:52Z | |
| dc.date.issued | 2018 | |
| dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/1563 | |
| dc.language.iso | en_US | en_US |
| dc.publisher | IIT BHU | en_US |
| dc.subject | Gate Structure Engineered Homo/Heterojunction | en_US |
| dc.subject | Double-Gate Tunnel FETs | en_US |
| dc.subject | Analytical Modeling | en_US |
| dc.title | Analytical Modeling and Simulation of Some Gate Structure Engineered Homo/ Heterojunction Double-Gate Tunnel FETs | en_US |
| dc.type | Thesis | en_US |
Files in this item
This item appears in the following Collection(s)
-
Department of Electronics Engineering [84]
This thesis is submitted by students/Research scholar/ faculty