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Simulation Study and Comparative Analysis of Some TFET Structures with a Novel Partial-Ground-Plane (PGP) Based TFET on SELBOX Structure
Singh, A.K.
;
Tripathi, M.R.
;
Chander, S.
;
Baral, K.
;
Singh, P.K.
;
Jit, S.
(
Springer
,
2020-10-01
)
Impact of interface trap charges on device level performances of a lateral/vertical gate stacked Ge/Si TFET-on-SELBOX-substrate
Singh, A.K.
;
Tripathi, M.R.
;
Baral, K.
;
Singh, P.K.
;
Jit, S.
(
Springer
,
2020-09-01
)
Investigation of DC, RF and linearity performances of a back-gated (BG) heterojunction (HJ) TFET-on-selbox-substrate (STFET): Introduction to a BG-HJ-STEFT based CMOS inverter
Singh, A.K.
;
Tripathi, M.R.
;
Baral, K.
;
Singh, P.K.
;
Jit, S.
(
Elsevier Ltd
,
2020-08
)
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Author
Baral, K. (3)
Jit, S. (3)
Singh, A.K. (3)
Singh, P.K. (3)
Tripathi, M.R. (3)
Chander, S. (1)
Subject
Band-to-band tunneling (BTBT) (3)
Selective buried oxide (SELBOX) (3)
Silicon on insulator (SOI) (2)
Tunnel field effect transistor (TFET) (2)
Back gate (BG) (1)
Heterojunction (1)
Interface trap charge (ITC) (1)
Linearity figure of merits (FOMs) (1)
Tunnel feld-efect transistor (TFET) (1)
... View More
Date Issued
2020 (3)
Has File(s)
Yes (3)